1. Field of the Invention
The present invention is generally related to interface circuits and more particularly to receiver input circuits for receiving differential digital signals.
2. Description of the Prior Art
Interface circuits facilitate the serial or parallel transmission of digital information between a transmission source, such as a computer, and a transmission destination, such as a modem, a printer or another computer. Interface circuits include transmission line drivers, which convert data signals of a first form (e.g., TTL) into RS (recommended standard) signals which are transmitted on data transmission lines, and receivers, which convert the RS signals into data signals acceptable to a designated device (e.g., TTL).
Interface circuits are typically designed to meet one of several interface standards including the following commonly-known types: RS-232 (EIA/TIA-232-E, adopted in 1991), RS-423 (EIA RS-423-A, adopted in 1978), RS-422 (TIA/EIA-422-B, adopted in 1994) and RS485 (EIA RS-485, adopted in 1983). Each of these interface standards define signal and load parameters such that data signals generated by a line driver circuit can be successfully received and converted by a receiver circuit, provided both the line driver circuit and the receiver circuit meet the same interface standard.
The oldest interface standard is RS-232 which supports one-way communications between a single transmission source and a single transmission destination separated by a maximum distance of 15 meters. Bit transmission is limited to 20K bits/second, and is based on a single-ended transmission signal transmission levels of +5 to +15 volts represent logic LOW signals, and transmission levels of -5 to -15 volts represent logic HIGH signals. However, as the interaction between computers and peripherals has grown more complex, use of the RS-232 standard has become limited due to its low transmission rate and lack of flexibility.
The RS-423 standard was adopted to provide faster and more flexible data transmission in applications which are beyond the capability of the RS-232 standard. The RS-423 standard supports bit transmission rate of 100K bits/second and transmissions lengths of up to 1200 meters. Further, the RS-423 standard allows simultaneous transmission from one transmitter circuit to as many as 10 receiver circuits. However, similar to the RS-232 standard, the RS-423 standard uses a single-ended transmission signal, thereby limiting its bit transmission rate.
The RS-422 and RS-485 standards were developed to overcome the limited bit transmission rate of the RS-232 and RS-423 standards. Instead of single-ended transmission signals, the RS-422 and RS-485 standards employ differential-mode signals-first and second differential signals having a common mode voltage level and differing by an offset voltage. By using the differential-mode signals, the maximum bit transmission rate for these standards is 10M bits/second (over short distances), and these signals can be transmitted up to 1200 meters (at low data transmission rates). Under the RS-422 and RS-485 standards, the differential signals received at input terminals of a receiver circuit must differ by 200 mV or more, and may vary across a common mode voltage of -7 V to +12 V. For example, if the first input signal is +10 V, then the second input voltage must be greater than 10.2 V, or less than 9.8 V.
The RS-422 differs from the RS-485 standard in that the RS-422 is limited to a single transmission source connected to ten receiver circuits, whereas the RS-485 standard allows the connection of 32 transmission sources and 32 transmission destinations, thereby allowing multi-point data communication.
FIG. 4 shows a simplified RS-485 receiver circuit 400 including input terminals IN1 and IN2 which receive differential input signals from an RS-485 transmitter circuit (not shown). The input terminals IN1 and IN2 are respectively connected to output terminals OUT1 and OUT2 through resistors RA1 (for example 80K.OMEGA.) and RA2 (for example 80K.OMEGA.), respectively. A voltage regulator 401 applies a reference voltage VREF to output terminals OUT1 and OUT2 through resistors RB1 (for example 20K.OMEGA.) and RB2 (for example 20K.OMEGA.), respectively. It is noted that the resistor values of resistors RA1, RA2, RB1 and RB2 are selected to correspond with resistor values used in the disclosed RS-485 embodiment of the present invention (discussed below).
To meet the requirements of the RS-485 standard, voltage regulator 401 is required to provide a stabilized reference voltage VREF of 2.5 V over a wide range of common mode input voltages (as mentioned above, under the RS-485 standard, the input voltages range from -7 V to +12 V). To meet this stabilized voltage requirement, it is necessary that Icc of voltage regulator 401 exceeds two times the maximum input current applied to input terminals IN1 and IN2. When the voltage at input terminal IN1 is 12 volts, and the voltage at input terminal IN2 is assumed to be approximately 12 volts, noting that RA1+RA2=RB1+RB2=100K.OMEGA., then the current at input terminals IN1 or IN2 approximately equals (12 V-2.5 V)/100K.OMEGA.=95 .mu.A. Therefore, Icc of voltage regulator 401 must be greater than two times 95 .mu.A, or greater than 190 .mu.A. It is noted that this Itc cannot be reduced even if the input signal is less than 12 V. As such, a large amount of power is consumed by the prior art receiver input circuit.